1. Technical Field
Apparatuses and methods consistent with exemplary embodiments relate to a memory, and more particularly, relate to a memory system including a dynamic random access memory (DRAM).
2. Description of the Related Art
Memories may be classified as nonvolatile memory and volatile memory. Nonvolatile memory retains data regardless of whether power is supplied. On the other hand, volatile memory loses stored data when power is not supplied. However, volatile memory generally has faster access time. Accordingly, volatile memory may be used as a working memory, a buffer memory, or an operation memory of a computing device or an electronic system.
A DRAM is one type of volatile memory. The DRAM may perform a refresh operation to maintain data during an operation. DRAM may be fabricated at a relatively low cost and may operate at very high frequencies. Accordingly, a computing device or an electronic system being widely used may employ one or more DRAMs as a working memory or a buffer memory to perform a lot of operations.
To this end, a DRAM system having a large buffering capacity is required. In order to increase the buffering capacity of the DRAM system, the DRAM system may include a lot of DRAM devices. However, due to a design limit, a DRAM controller which controls an overall operation of the DRAM system may recognize the limited number of DRAM devices or may support a DRAM system having a limited capacity.
Accordingly, it is necessary to redesign a DRAM controller to address the limited buffering capacity supported by the DRAM controller. However, redesigning the DRAM controller takes a long time and requires a heavy cost.